Features
********

- Generate makefiles for gcc and icc
- Define own variables and targets that get included
- Relies on the build-in dependency generation of the compiler
- Works for c and c++ project
- Creates a single makefile in your project base directory that
  creates the executable and a makefile for every subdirectory 
  that only compiles the sources to object files
- Exclude files from automatic inclusion


Installation
************

Copy the makegen script either to a location in your PATH or to your 
local project directory.


Configuration
*************

Create a configuration file with at most three sections of the 
following scheme:

section_name {
	contents
}


config
------
The 'config'-section is made up of key-value-pairs:
key=value

The following settings are possible
  target: the name of the generated executable
  compiler: the name of or path to the compile executable
  subdir: Subdirs that should be included 
    (optional and multiple statements possible)
  exclude: Ignore this file 
    (optional and multiple statements possible)
  include_paths: Paths seperated by | that are needed
    for dependency generation. These paths are automatically
    added to your CFLAGS (optional)


variables
---------

The content of the 'variables'-section is pasted to every generated
makefile after the definition of CPP and TARGET variables.


targets
-------

The content of the 'targets'-section is pasted to every generated 
makefile after all generated targets.


Generated and used variables
----------------------------

The following variables are generated:
- CPP: The compiler
- TARGET: The desired name of the executable
- INCLUDE: Includes from include_paths statements
- SRC: Sources filenames for every file (base makefile) or
   for the current subdirectory (searchs *.c and *.cpp)
- OBJ: Files in SRC with extension replaced by .o

The following variables are used and may be defined by the user:
- CFLAGS: Compiler flags
- LDFLAGS: Linker flags



Usage
*****

The following targets are generated:
- <target>: First target in base directory makefile, the target name 
  from config-section (base makefile only!)
- objects: Target to create all object file in the current focus (all
  or subdirectory only)
- clean: Deletes all object files in the current focus and the 
  executable if its the base makefile
- depend: Call this to regenerate the makefile(s). The location of the 
  executable and the configuration file that was used for first
  generation are automatically used



Configuration files are searched in the following order
1. first command line argument
2. As Makefile.conf in the current direcotry
3. As makefile.conf in the current direcotry


Possible first generations of a makefile for a project:
 makegen [conf_file]			if in PATH
 <path>/makegen [conf_file]	

Regeneration of the makefile(s) after initial generation to 
- represent changed depenencies
- include new files
- drop deleted files from makefile

 make depend


*******

Written by Tobias Hammer <tobi (at) der - hammer (dot) info>


